Technical Field
This disclosure is directed to integrated circuits, and more particularly, circuits for generating clock signals used in integrated circuits.
Description of the Related Art
Integrated circuits having sequential logic utilize clock signals to synchronize operation. The clock signals may be generated using various types of clock circuits, such as oscillators, phase locked loops, and so forth.
In some synchronous circuits, multiple clock signals may be utilized. Moreover, in some cases, the multiple clock signals may have different phase relationships with respect to one another relative to a reference clock signal. For example, clock signals having phase differences of 45°, 90°, 135°, 180°, and so forth may be generated. Accordingly, clock circuits may be implemented to generate these clock signals. One type of circuit that could be used to generate multiple clock signals having different phases is a delay locked loop (DLL). A DLL may include multiple tap points. Respective clock signals having different phase relationships with respect to a reference clock signal provided as an input to the DLL may be provided.